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STORAGE PRODUCTS

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MIPI M-PHY

It supports both master and slave roles in HS Gear 3 to 1 and LS operation. MPHY uses MIPI's RMMI interface.

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UHS-II/I/SD-PHY

The UHS-II standard is targeted for mobile, portable applications and home applications, provides enhanced data rate, while maintaining low power and low EMI. The Legacy SD IOs supports traditional operation speed like DS, HS, DDR50 and SDR50/104 for providing the features of backwards compatibility. UHS-II PHY interface achieves a peak speed of 3.12Gbps. It consists of at least two lanes based on differential signaling lines. Each lane provides up to 156MB/sec.The direction of both lanes can be configured as two opposite ways (FD mode), or same way (2L-HD mode). In 2L-HD mode case, the interface speed is doubled to 312MB/sec. It is also possible to have more than two Lanes, 3 or 4 Lanes for increasing system speed.

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ONFI PHY

The Open NAND Flash Interface (ONFI) is an Open standard for NAND Flash Memory chips. The ONFI rev4.2 supports multiple modes of operation like SDR, NV-DDR, NV-DDR2, and NV-DDR3 modes. ONFI rev4.2 PHY incorporates the full TX/RX logic for NV-DDR, NV-DDR2 and NV-DDR3 modes of operation, and is backwards compatible to SDR mode of operation.

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