GDDR6 (Graphics Double Data Rate Type-6 Synchronous Dynamic Random-Access Memory) is a modern type of synchronous graphics random-access memory (SGRAM) with a high bandwidth ("double data rate") interface designed for use in graphics cards, game consoles, and high-performance computation. The finalised specification was published by JEDEC in July 2017. GDDR6 offers increased per-pin bandwidth (up to 16 Gbps) and lower operating voltages (1.35 V), increasing performance and decreasing power consumption relative to GDDR5/GDDR5X.
A performance leading DDR PHY that supports DDR5/LPDDR5 DDR4/LPDDR4/ DDR3/LPDDR3/ DDR2/LPDDR2/ DDR at speeds up to 6400Mb/s and in any bus width. Silicon proven in volume manufacturing. A self-contained, but modular design, the PHY contains the I/Os, ESD, a timing synch module DLLs and can be expanded to a virtually unlimited bus width.
The second-generation HBM (HBM2/2E) technology, which is outlined by the JESD235C standard, inherits physical 128-bit DDR interface with 2n prefetch architecture, internal organization, 1024-bit input/output, 1.2 V I/O and core voltages as well as all the crucial parts of the original tech. Just like the predecessor, HBM2/2E supports two, four or eight DRAM devices on a base logic die (2Hi, 4Hi, 8Hi stacks) per KGSD. HBM Gen 2/2E expands capacity of DRAM devices within a stack to 8 Gb and increases supported data-rates up to 1.6 Gb/s or even to 3.2 Gb/s per pin. In addition, the new technology brings an important improvement to maximize actual bandwidth.